1. Field Of The Invention
The present invention relates to user-configurable integrated circuits. More particularly, the present invention relates to user-configurable integrated circuits including logic circuits fabricated from low-voltage devices having relatively low breakdown voltages disposed on the same integrated circuit substrate as user-programmable interconnect elements which are programmed by application of a programming voltage in excess of the voltage which can be withstood by the low-voltage devices. In such integrated circuits, both the inputs and outputs of such low-voltage devices are typically connected to circuit nodes common to one or more of the user-programmable interconnect elements. The present invention includes circuits for preventing damage to the inputs of the low-voltage devices by isolating these circuit nodes from the inputs of the low-voltage devices during the application of high voltage while programming the user-programmable interconnect elements.
2. The Prior Art
Presently-known user-configurable integrated circuits which employ user-programmable interconnect elements programmed by application of a relatively high programming voltage to the user-programmable interconnect elements require some form of isolation between the circuit nodes to which the high programming voltage is applied and other circuit nodes connected to the inputs of low-voltage devices, such as low-voltage MOS transistors, which are used in the functional circuitry of the integrated circuits.
Examples of such user-configurable integrated circuits include the ACT-1xxx family of user-configurable gate array integrated circuits manufactured and marketed by Actel Corporation of Sunnyvale, California, assignee of the present application. These integrated circuits employ isolation structures to connect the inputs of the low-voltage devices comprising the logic circuits in the array to the array of antifuses which are programmed by a user to interconnect the low-voltage circuits in a desired manner.
The isolation structure used in these products acts to disconnect the inputs of the low-voltage logic circuits from the antifuse array during programming of the antifuses in order to protect the low-voltage devices against destruction resulting from transistor breakdown mechanisms caused by application of the high programming voltage. While this isolation circuit structure is useful to preventing damage to the inputs of the low-voltage logic circuits during antifuse programming, it presents several problems.
First, the current isolation structure requires a charge pump to generate the voltages necessary for its operation. Charge pumps take up space on the integrated circuit die layout and add standby power to the integrated circuit operating requirements. The provision of charge pump circuits creates circuit layout problems because of the high voltage considerations, and otherwise complicates the design of the integrated circuit.
One such problem created by charge pump circuits is that the pump line is inherently a VTIF line for a parasitic MOS field device. This type of line creates a layout problem because its poly can only comprise a single gate. If two or more gates are connected to such a line, they must be broken by a metal jumper which breaks a parasitic MOS field device. Providing jumpers consumes additional layout area and blocks metal routing paths. Since a pump line typically runs to all inputs of functional circuit modules in a user-configurable circuit array, many jumpers are required.
In addition, the isolation circuit structure inherently produces a power inrush current which must be controlled by providing high power charge pumps and shut-down logic. These circuits add further to the standby power dissipation of the integrated circuit, occupy additional area on the integrated circuit die, and further complicate the design.
Finally, since this isolation device is in the signal path when the integrated circuit is not in a programming cycle, it acts as a delay element in series with the data path, thus slowing down the performance of the integrated circuit.
Given the proliferation of user-configurable integrated circuits which utilize user-programmable interconnect elements which require programming voltages higher than the breakdown voltages of the low-voltage MOS transistors used to configure the operating circuitry on the integrated circuit, there is a need for circuitry which functions during programming to isolate circuit nodes carrying high programming voltages from circuit nodes configured from low-voltage devices.